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general description the dg411f/dg412f/dg413f are quad, single-pole/sin-gle-throw (spst), fault-protected analog switches. they are pin compatible with the industry-standard nonpro- tected dg411/dg412/dg413. these new switches fea- ture fault-protected inputs and rail-to-rail ? signal- handling capability. all terminals are protected fromovervoltage faults up to ?6v with power on and up to ?0v with power off. during a fault condition, the com, no, or nc terminal becomes an open circuit and only microamperes of leakage current flow from the source. on-resistance is 35 (max) and is matched between switches to 1.5 (max) at +25?. the dg411f has four normally closed (nc) switches.the dg412f has four normally open (no) switches. the dg413f has two nc and two no switches. these cmos switches operate with dual power supplies rang- ing from ?.5v to ?0v or a single supply between +9v and +36v. all digital inputs have +0.8v and +2.4v logic thresholds, ensuring both ttl and cmos logic com- patibility when using ?5v or a single +12v supply. for supply voltages of ?v, +5v, and +3v, refer to the max4711/max4712/max4713 data sheet. applications communication systemssignal routing test equipment data acquisition industrial and process control systems avionics redundant/backup systems features ? no power-supply sequencing required ? rail-to-rail signal handling ? all switches off with power off ? all switches off when v+ is off and v- is on ? ?0v fault protection with power off ? ?6v fault protection with ?5v supplies ? control line fault protection fromv- - 0.3v to v- + 40v ? pin compatible with industry-standarddg411/dg412/dg413 ? 20ns (typ) fault response time ? 35 (max) r on with ?5v supplies ? ?.5v to ?0v dual supplies ? +9v to +36v single supply ? ttl- and cmos-compatible logic inputs with?5v or single +9v to +15v supplies dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 19-2418; rev 0; 4/02 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part temp range pin-package dg411f eue -40 c to +85 c 16 tssop dg411fdy -40 c to +85 c 16 so DG411FDJ -40 c to +85 c 16 plastic dip n.c. = not connected. switches shown for logic 0 input. all switches are off with power removed. top view dip/tssop/so dg411f logic switch 01 on off 1615 14 13 12 11 10 9 12 3 4 5 6 7 8 in2com2 nc2 v+ v- nc1 com1 in1 dg411f n.c.nc3 com3 in3 in4 com4 nc4 gnd pin configurations ________________________________________________________________ maxim integrated products 1 rail-to-rail is a registered trademark of nippon motorola, ltd. pin configurations continued at end of data sheet. functional diagram appears at end of data sheet. ordering information continued at end of data sheet. downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (voltages referenced to gnd) v+ ...........................................................................-0.3v to +44v v- ............................................................................-44v to +0.3v v+ to v-...................................................................-0.3v to +44v in_ ......................................................... (v- - 0.3v) to (v- + 40v) no_, nc_ to com_ (note1) ................................... -40v to +40v com_, no_, nc_ voltage with power on (note 1).............................................. -36v to +36v com_, no_, nc_ voltage with power off (note 1).............................................. -40v to +40v continuous current (any terminal) .................................. 30ma peak current com_, no_, nc_ (pulsed at 1ms, 10% duty cycle) ............................... 100ma continuous power dissipation (t a = +70 c) 16-pin tssop (derate 9.4mw/ c above +70 c) ....... 755mw 16-pin so (derate 8.7mw/ c above +70 c)................696mw 16-pin plastic dip (derate 10.53mw/ c above +70 c) ........................................................ 842mw operating temperature range .......................... -40 c to +85 c junction temperature .................................................... +150 c storage temperature range ........................... -65 c to +160 c lead temperature (soldering, 10s) ............................... +300 c electrical characteristics 15v dual supplies (v+ = +15v, v- = -15v, v ih = +2.4v, v il = +0.8v, gnd = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (notes 2, 3) parameter sym b o l conditions t a min typ max units analog switch fault-free analog signal range v c om _ , v n o_ , v n c _ ev - v +v +25 c 25 35 on-resistance r on i com_ = 10ma, v no_ , v nc_ = 10v e4 5 +25 c 0.2 1.5 on-resistance match betweenchannels (note 4) ? r on i com_ = 10ma, v no_ , v nc_ = 10v e 2.0 +25 c 1.0 3 on-resistance flatness r flat ( on ) i com_ = 10ma, v no_ , v nc_ = 5v, 0 e4 +25 c -0.25 +0.025 +0.25 no_, nc_ off-leakage current (note 5) i no_(off) , i nc_ ( off ) v com_ = 10v, v no_ , v nc_ = 10v e -20 +20 na +25 c -0.25 +0.025 +0.25 com_ off-leakage current(note 5) i com_ ( off ) v com_ = 10v, v no_ , v nc_ = 10v e -20 +20 na +25 c -0.5 +0.025 +0.5 com_ on-leakage current(note 5) i com_ ( on ) v com_ = 10v, v no_ , v nc_ = 10v or floating e -40 +40 na fault v+ = +15v, v- = -15v e -36 +36 v+ = 0, v- = -15v e -36 +36 fault-protected analog signalrange v com_ , v no_ , v nc_ v+ = v- = 0 e -40 +40 v +25 c -1 +1 no_ or nc_ off-leakagecurrent i no_ , i nc_ v no_ , v nc_ = 36v e -10 +10 ? +25 c -1 +1 com_ off-leakage current i com_ v com_ = 36v e -10 +10 ? note 1: com_, no_, and nc_ pins are fault protected. signals on com_, no_, and nc_ exceeding -36v to +36v may damage thedevice during power-on conditions. when the power is off, the maximum range is -40v to +40v. downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches _______________________________________________________________________________________ 3 electrical characteristics 15v dual supplies (continued) (v+ = +15v, v- = -15v, v ih = +2.4v, v il = +0.8v, gnd = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (notes 2, 3) parameter sym b o l conditions t a min typ max units +25 c -1 +1 no_ or nc_ leakage current i no_ , i nc_ v no_ , v nc_ = 40v, v+ = v- = 0 e -10 +10 ? +25 c -1 +1 com_ leakage current i com_ v com_ = 40v, v+ = v- = 0 e -10 +10 ? +25 c -1 +1 no_ or nc_ off-leakagecurrent i no_ , i nc_ v+ = 0, v- = -15v,v no_ , v nc_ = 36v e -10 +10 ? +25 c -1 +1 com_ off-leakage current i com_ v+ = 0, v- = -15v,v com_ = 36v e -10 +10 ? fault-trip threshold e v- - 0.4 v+ + 0.4 v fault output turn-off delay v no_ , v nc_ = 36v, r l = 1k e2 0n s fault recovery time v no_ , v nc_ = 36v, r l = 1k e1 s switch dynamics +25 c 70 175 turn-on time t on v no_ or v nc_ = 10v, r l = 300 , c l = 35pf, figure 2 e 220 ns +25 c 55 145 turn-off time t off v no_ or v nc_ = 10v, r l = 300 , c l = 35pf, figure 2 e 160 ns +25 c 21 5 break-before-make time delay(dg413f only) (note 6) t bbm v no_ or v nc_ = 10v, r l = 100 , c l = 10pf, figure 3 e1 ns charge injection q v gen = 0, r gen = 0, c l = 1nf, figure 4 +25 c 5p c no_ or nc_ off-capacitance c n_ ( off ) f = 1mhz, figure 5 +25 c 15 pf com_ off-capacitance c com_ ( off ) f = 1mhz, figure 5 +25 c 15 pf com_ on-capacitance c com_ ( on ) f = 1mhz, figure 5 +25 c 47 pf off-isolation (note 7) v iso f = 1mhz, r l = 50 , c l = 15pf, p in = 0dbm, figure 6 +25 c -65 db channel-to-channel crosstalk(note 8) v ct f = 1mhz, r l = 50 , c l = 15pf, p in = 0dbm, figure 6 +25 c -105 db logic input input logic high v ih e 2.4 v input logic low v il e 0.8 v input leakage current i in v in_ = 0 or v+ e -1 +1 a power supply power-supply range v+, v- e 4.5 20 v +25 c 355 600 all v in_ = +5v, v com_ = 0 e 800 +25 c 155 300 v+ supply current i+ all v in_ = 0 or v+, v com_ = 0 e 400 ? downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 4 _______________________________________________________________________________________ parameter sym b o l conditions t a min typ max units analog switch fault-free analog signal range v com_ , v no_ , v nc_ e 0 v+ v +25 c5 6 8 5 on-resistance r on i com_ = 1ma, v no_ , v nc_ = +10v e 120 +25 c 1.0 4 on-resistance match betweenchannels (note 4) ? r on i com_ = 1ma, v no_ , v nc_ = +10v e5 +25 c -0.25 +0.25 no_, nc_ off-leakage current(note 5) i no_(off) , i nc_ ( off ) v com_ = +1v, +10v, v no_ , v nc_ = +10v, +1v e -20 +20 na +25 c -0.5 +0.25 com_ off-leakage current(note 5) i com_ ( off ) v com_ = +1v, +10v, v no_ , v nc_ = +10v, +1v e -20 +20 na +25 c -0.5 +0.5 com_ on-leakage current(note 5) i com_ ( on ) v com_ = +1v, +10v, v no_ , v nc_ = +1v, +10v, or floating e -40 +40 na fault power on e -36 +36 fault-protected analogsignal range v com_ , v no_ , v nc_ power off e -40 +40 v +25 c- 1 + 1 no_ or nc_ off-leakagecurrent (note 5) i no_ , i nc_ v no_ , v nc_ = 36v e -10 +10 ? +25 c- 1 + 1 com_ off-leakage current(note 5) i com_ v no_ , v nc_ = 36v e -10 +10 ? +25 c- 1 + 1 no_ or nc_ leakage current(note 5) i no_ , i nc_ supplies off, v no_ , v nc_ = 40v e -10 +10 ? parameter sym b o l conditions t a min typ max units +25 c 155 250 all v in_ = +5v, v com_ = 0 e 325 +25 c 155 250 v- supply current i- all v in_ = 0 or v+, v com_ = 0 e 325 ? +25 c 200 350 all v in_ = +5v, v com_ = 0 e 475 +25 c 0.1 1 gnd supply current i gnd all v in_ = 0 or v+, v com_ = 0 e1 0 ? electrical characteristics single +12v supply (v+ = +12v, v- = 0, v ih = +2.4v, v il = +0.8v, gnd = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (notes 2, 3) electrical characteristics 15v dual supplies (continued) (v+ = +15v, v- = -15v, v ih = +2.4v, v il = +0.8v, gnd = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (notes 2, 3) downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches _______________________________________________________________________________________ 5 note 2: the algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. note 3: electrical specifications at -40 c are not production tested and guaranteed by design. note 4: ? r on = ? r on(max) - ? r on(min) . note 5: leakage parameters are 100% tested at maximum rated temperature and with dual supplies and guaranteed by design at +25 c. note 6: guaranteed by design. note 7: off-isolation = 20 log 10 [v com /(v nc or v no )], v com = output, v nc or v no = input to off switch. note 8: between any two switches. electrical characteristics single +12v supply (continued) (v+ = +12v, v- = 0, v ih = +2.4v, v il = +0.8v, gnd = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (notes 2, 3) parameter sym b o l conditions t a min typ max units +25 c -1 +1 com_ leakage current(note 5) i com_ supplies off, v no_ , v nc_ = 40v e -10 +10 ? +fault output turn-off delay v no_ , v nc_ = +36v, r l = 1k e2 0n s +fault recovery time v no_ , v nc_ = +36v, r l = 1k e1 s switch dynamics +25 c 120 250 turn-on time t on v no_ or v nc_ = +10v, r l = 300 , c l = 35pf, figure 2 e 315 ns +25 c 70 125 turn-off time t off v no_ or v nc_ = +10v, r l = 300 , c l = 35pf, figure 2 e 140 ns +25 c 25 0 break-before-make time delay(dg413f only) (note 6) t bbm v no_ or v nc_ = +10v, r l = 100 , c l = 10pf, figure 3 e1 ns charge injection q v gen = 0, r gen = 0, c l = 1nf, figure 4 +25 c 5p c logic input input logic high v ih e 2.4 v input logic low v il e 0.8 v input leakage current(note 5) i in v in_ = 0 or v+ e -1 +1 a power supply power-supply range v+ e +9 +36 v +25 c 180 350 all v in_ = +5v, v com_ = +6v e 450 +25 c 85 150 v+ supply current i+ all v in_ = 0 or v+, v com_ = +6v e 250 ? downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 6 _______________________________________________________________________________________ typical operating characteristics (t a = +25 c, unless otherwise noted.) turn-on/turn-off times vs. supply voltage (dual supplies) dg411 toc09 supply voltage (v+, v-) t on /t off (ns) 15 10 50 100 150 200 250 300 0 52 0 t on t off logic-level threshold voltage vs. supply voltage dg411 toc08 supply voltage (v) threshold voltage (v) 35 30 25 20 15 10 1.5 2.0 2.5 3.01.0 54 0 dual or single supplies supply current vs. temperature dg411 toc07 temperature ( c) supply current ( a) 60 35 10 -15 100 200 300 400 500 0 -40 85 dual supplies:v+ = +15v, v- = -15v, v in_ = +5v i+ i- i gnd charge injection vs. v com dg411 toc06 v com (v) q (pc) 10 5 0 -5 -10 -10 0 10 20 30 40 -20 -15 15 dual supplies: 15v singlesupply: +12v on/off-leakage current vs. temperature dg411 toc05 temperature ( c) leakage current (pa) 60 35 10 -15 0.1 1 10 100 1000 10,000 0.01 -40 85 i com(on) i com(off) i no(off) , i nc(off) dual supplies:v+ = +15v, v- = -15v on-resistance vs. v com and temperature (single supply) dg411 toc04 v com (v) r on ( ) 10 8 6 4 2 20 40 60 80 100 0 01 2 v+ = +12vv- = 0 t a = +85 c t a = +25 c t a = -40 c on-resistance vs. v com (single supply) dg411 toc03 v com (v) r on ( ) 30 24 18 12 6 20 40 60 80 100 0 03 6 v+ = +9v v- = 0 v+ = +12v v- = 0 v+ = +15v v- = 0 v+ = +24v v- = 0 v+ = +36v v- = 0 v+ = +28v v- = 0 on-resistance vs. v com and temperature (dual supplies) dg411 toc02 v com (v) r on ( ) 10 5 0 -5 -10 10 20 30 40 50 0 -15 15 v+ = +15vv- = -15v t a = +85 c t a = +25 c t a = -40 c on-resistance vs. v com (dual supplies) dg411 toc01 v com (v) r on ( ) 15 10 5 0 -5 -10 -15 20 40 60 80 100 0 -20 20 v+ = +5v v- = -5v v+ = +10v v- = -10v v+ = +15v v- = -15v v+ = +20v v- = -20v downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches _______________________________________________________________________________________ 7 typical operating characteristics (continued) (t a = +25 c, unless otherwise noted.) fault current vs. fault voltage (single supply) dg411 toc16 v com (v) i com ( a) 40 20 -40 -20 0 -150 -100 -50 0 50 100 150 200 -200 -60 60 for 0v < v com < v supply , i com = v com /r l fault current vs. fault voltage (dual supplies) dg411 toc15 v com (v) i com ( a) 40 20 -40 -20 0 -150 -100 -50 0 50 100 150 200 -200 -60 60 dual supplies:v+ = +15v, v- = -15v for |v com | < v supply , i com = v com /r l total harmonic distortion vs. frequency dg411 toc14 frequency (hz) thd (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k 15v dual supplies in = out = 600 , v p-p = 5v frequency response dg411 toc13 frequency (mhz) loss (db) 10 1 0.1 0.01 -100 -80 -60 -40 -20 0 20 -120 0.001 100 v+ = +15v, v- = -15v on-response off-isolation crosstalk turn-on/turn-off times vs. temperature (single supply) dg411 toc12 temperature ( c) t on /t off (ns) 60 35 10 -15 50 100 150 200 0 -40 85 t on t off v+ = +12v, v- = 0 turn-on/turn-off times vs. temperature (dual supplies) dg411 toc11 temperature ( c) t on /t off (ns) 60 35 10 -15 20 40 60 80 100 120 0 -40 85 t on t off dual supplies: 15v turn-on/turn-off times vs. supply voltage (single supply) dg411 toc10 supply voltage (v+) t on /t off (ns) 27 18 50 100 150 200 0 93 6 t on t off v- = gnd downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 8 _______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25 c, unless otherwise noted.) fault response (v+ = 0, v- = -15v) dg411 toc22 2ms/div gnd v com_ output v no_ , v nc_ input +25vgnd -25v fault recovery time (negative input) dg411 toc21 1 s/div gnd v com_ output -5v v no_ , v nc_ input -5vgnd -25v fault recovery time (positive input) dg411 toc20 1 s/div gnd v com_ output +5v v no_ , v nc_ input +25vgnd +5v fault step response (negative input) dg411 toc19 2ms/div gnd v com_ output -5v -5v v no_ , v nc_ input -25v gnd fault step response (positive input) dg411 toc18 gnd v com_ output gnd v no_ , v nc_ input 2ms/div +5v +25v input overvoltage vs. output dg411 toc17 gnd +25v+15v -22v -15v v com_ output gnd v no_ , v nc_ input 20ms/div downloaded from: http:///
detailed description the dg411f/dg412f/dg413f are fault-protectedcmos analog switches with unique operation and construction. these switches differ considerably from traditional fault-protection switches, with several advan- tages. first, they are constructed with two parallel fets, allowing very low on-resistance when the switch is on. second, they allow signals on the no_ or nc_ pins that are within, or slightly beyond, the supply rails to be passed through the switch to the com_ terminal (or vice versa), allowing true rail-to-rail signal operation. third, the dg411f/dg412f/dg413f have the same fault-protection performance on any of the no_, nc_, or com_ switch inputs. operation is identical for both fault polarities. the fault protection extends to ?6v from gnd with 15v supplies. during a fault condition, the particular overvoltage input(com_, no_, nc_) pin becomes high impedance regardless of the switch state or load resistance. when power is removed, the fault protection is still in effect. in this case, the com_, no_, or nc_ terminals are a virtu- al open circuit. the fault can be up to ?0v with power off. the switches turn off when v+ is not powered, regardless of v-. pin compatibility these switches have identical pinouts to common non-fault-protected cmos switches. they allow for carefree direct replacement in existing printed circuit boardssince the no_, nc_, and com_ pins of each switch are fault protected. internal construction internal construction is shown in figure 1, with the ana- log signal paths shown in bold. a single no switch isshown. the nc configuration is identical except the logic-level translator becomes an inverter. the analog switch is formed by the parallel combination of n-chan- nel fet (n1) and p-channel fet (p1), which are driven on and off simultaneously according to the input fault condition and the logic-level state. normal operation two comparators continuously compare the voltage onthe com_, no_, and nc_ pins with v+ and v-. when the signal on com_, no_, or nc_ is between v+ and v-, the switch acts normally, with fets n1 and p1 turn- ing on and off in response to in_ signals. the parallel combination of n1 and p1 forms a low-value resistor between no_ (or nc_) and com_ so that signals pass equally well in either direction. positive fault condition when the signal on no_ (or nc_) and com_ exceedsv+ by about 50mv, the high-fault comparator output is high, turning off fets n1 and p1. this makes the no_ (or nc_) and com_ pins high impedance regardless of dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches _______________________________________________________________________________________ 9 pin dg411f dg412f dg413f name function 1, 16, 9, 8 1, 16, 9, 8 1, 16, 9, 8 in1, in2, in3, in4 logic control digital inputs 2, 15, 10, 7 2, 15, 10, 7 2, 15, 10, 7 com1, com2, com3, com4 analog switch common terminals 3, 14, 11, 6 nc1, nc2, nc3, nc4 analog switch normally closed terminals 3, 14, 11, 6 no1, no2, no3, no4 analog switch normally open terminals 3, 6 no1, no4 analog switch normally open terminals 14, 11 nc2, nc3 analog switch normally closed terminals 444 v - negative-supply voltage input. connect to gnd for single-supply operation. bypass with a 0.1? capacitor to gnd. 5 5 5 gnd ground. connect to digital ground. 12 12 12 n.c. no connection. not internally connected. 13 13 13 v+ positive-supply voltage input. bypass with a 0.1? capacitorto gnd. pin description downloaded from: http:///
dg411f/dg412f/dg413f the switch state. if the switch state is off, all fets areturned off and both no_ (or nc_) and com_ are high impedance. negative fault condition when the signal on no_ (or nc_) and com_ exceedsv- by about 50mv, the low-fault comparator output is high, turning off fets n1 and p1. this makes the no_ (or nc_) and com_ pins high impedance regardless of the switch state. if the switch state is off, all fets are turned off and both no_ (or nc_) and com_ are high impedance. transient fault response and recovery when a fast rise-time and fall-time transient on no_,nc_, or com_ exceeds v+ or v-, the output follows the input to the supply rail with only a few nanoseconds delay. this delay is due to the switch on-resistance and circuit capacitance to ground. when the input transient returns to within the supply rails, however, there is a longer output recovery time delay. for positive faults, the recovery time is typically 1?. for negative faults, the recovery time is typically 0.5?. these values depend on the output resistance and capacitance, and are not production tested or guaranteed. the delays are not dependent on the fault amplitude. higher load resistance and capacitance increase recovery times. fault-protection voltage and power off the maximum fault voltage on the no_ (or nc_) andcom_ pins is ?6v with power applied and ?0v with power off. failure modes exceeding the fault-protection voltage limits on no_,nc_, or com_, even for very short periods, can cause the device to fail. see the absolute maximum ratings. the failure modes may not be obvious, and failure inone switch may or may not affect other switches in the same package. ground there is no galvanic connection between the analogsignal paths and gnd. the analog signal paths consist of an n-channel and p-channel mosfet with their sources and drains paralleled and their gates driven out of phase to v+ and v- by the logic-level translators. however, the potential of the analog signals must be defined or at least limited with respect to gnd. v+ and gnd power the internal logic and logic-leveltranslators and set the input logic thresholds. the logic- level translators convert the logic levels to switched v+ and v- signals to drive the gates of the analog switch- es. this drive signal is the only connection between the power supplies and the analog signals. in_ logic-level thresholds the logic-level thresholds are cmos and ttl compati-ble when v+ is +15v. as v+ is raised, the threshold increases slightly, and when v+ reaches 25v, the level threshold is about 2.3v, above the ttl output high-level minimum of 2.4v, but still compatible with cmos out- puts (see the typical operating characteristics ). v- has no effect on the logic-level thresholds. bipolar supplies the dg411f/dg412f/dg413f operate with bipolarsupplies between ?.5v and ?0v. the v+ and v- sup- plies need not be symmetrical, but their difference can- not exceed the absolute maximum rating of 44v. single supply the dg411f/dg412f/dg413f operate from a single supply between +9v and +36v when v- is connected to gnd. chip information transistor count: 251process: cmos substrate connected to: v+ quad, rail-to-rail, fault-protected, spst analog switches 10 ______________________________________________________________________________________ ordering information (continued) part temp range pin-package dg412f eue -40 c to +85 c 16 tssop dg412fdy -40 c to +85 c 16 so dg412fdj -40 c to +85 c 16 plastic dip dg413f eue -40 c to +85 c 16 tssop dg413fdy -40 c to +85 c 16 so dg413fdj -40 c to +85 c 16 plastic dip downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches ______________________________________________________________________________________ 11 test circuits/timing diagrams figure 1. functional diagram normally open switch construction com_ dg411fdg412f dg413f p1 n1 on low fault high fault v+ no_ in_ gnd esd diode v- figure 2. switch turn-on/turn-off times 50% t on 3v0v v in_ 0v 90% t off v in_ v+ gnd v+ no_ or nc_ com_ 10v r l c l v- v- v- is connected to gnd (0v) for single-supply operation. 10v v out v out dg411fdg412f dg413f 90% downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 12 ______________________________________________________________________________________ test circuits/timing diagrams (continued) figure 3. dg413f break-before-make interval v in_ v+ gnd v+ no_ com_ 10v r l c l v- v- v- is connected to gnd (0v) for single-supply operation. v out dg413f com_ nc_ in_in_ 50% 3v0v v no_ , v nc_ v out v in_ 0v 90% t bbm t r < 5ns t f < 5ns figure 4. charge injection v in_ v+ gnd v+ no_ or nc_ com_ c l v- v- v- is connected to gnd (0v) for single-supply operation. v out dg411fdg412f dg413f in_ r gen v gen 0v 3v ? v out v in_ v out ? v out is the measured voltage due to charge- transfer error q when the channel turns off q = ? v out x c l figure 5. com_, no_, nc_ capacitance v+ gnd v+ no_ com_ v- v- v- is connected to gnd (0v) for single-supply operation. dg411fdg412f dg413f in_ nc_ v+ 1mhz capacitance analyzer downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches ______________________________________________________________________________________ 13 test circuits/timing diagrams (continued) figure 6. frequency response, off-isolation, and crosstalk v+ gnd v+ com_ no_, nc_ v- v- measurements are standardized against short and open at socket terminals. off-isolation is measured between com_ and "off" no_ or nc_ terminals. on-response is measured between com_ and "on" no_ or nc_ terminals. crosstalk is measured between com_ terminals with all switches on. v- is connected to gnd (0v) for single-supply operation. dg411fdg412f dg413f in_ 10nf 10nf v in v out network analyzer 50 50 50 50 meas ref 50 50 resistor only needed for crosstalk and isolation 3.0v n.c. = not connected. switches shown for logic ??input. all switches are off with power removed dip/tssop/so dg412f logic switch 01 off on top view dip/tssop/so dg413f logic switches 1, 4 01 off on switches 2, 3 on off 1615 14 13 12 11 10 9 12 3 4 5 6 7 8 in2 com2 nc2 v+ v- no1 com1 in1 dg413f n.c.nc3 com3 in3 in4 com4 no4 gnd 1615 14 13 12 11 10 9 12 3 4 5 6 7 8 in2 com2 no2 v+ v- no1 com1 in1 dg412f n.c.no3 com3 in3 in4 com4 no4 gnd pin configurations (continued) downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches 14 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) pdipn.eps downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches ______________________________________________________________________________________ 15 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) tssop,no pads.eps downloaded from: http:///
dg411f/dg412f/dg413f quad, rail-to-rail, fault-protected, spst analog switches maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) 16l soic.eps downloaded from: http:///

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